Co-simulation of Analog & Digital cells

[moisiad]

Hi all

I am doing analog design in cadence enviroment using Spectre. Can you please inform me how can i simulate analog cells (in transistor levels) along with digital cells (in verilog). I assume that the difficulty is to translate the logical levels of the digital cells in analog signals recognisable from the analog part.

Thanks

 

[luxboy]

To simulate chips in transistor level, you can try Synopsys' Powermill or Nanosim

 

[ee_joe]

hsim is also a choice

 

[anjali]

we can use the simulators VCS or verilog AMS for mixed signal simulations.

 

[jimjim2k]

we can use the simulators VCS or verilog AMS for mixed signal simulations.

Hi

Have you a sample tutorial or code of mixed signal with synopsys VCS?
The complexity is no matter.


tnx

 

[anjali]

some examples might be given in VCS user guides. please refer..
i too didnt use vcs much.

 

[firegun]

You can use the SpectreVerilog option to simulate your circuit.I think that can help you.You should create a .config file in your circuit view first.

 

[gaonkc]

you can use vcs+manosim to simulate
vcerilog+Spectre to simulate the mixed-signal simulation

 

[eda_freak]

For digital and analog cosimulation several AMS tools are available from various vendors like cadence,mentor,synopsys.

 

[jjww110]

nanosim is popular!!

 

[sallehs]

HSIM can do it very elegently, as long as you can convert verilog/vhdl to spice netlist. The rest are just like spice simulator.