Can anyone provide me with a solution for avoiding clock not able to capture while other clocks are off (C4) violation while attempting to get test coverage with tetramax for a scan inserted netlist.
I have even tried autofixing the clocks while doing scan insertion, but it is not working.
First thing you need to check is that it is a valid capture clock. If not then remove this clock from the clocks defnition.
If it is a valid clock then you will have to use th GSV of Tetramax to find why is it blocked. Set the pin data to constraint value and trace around the clock to see if it is getting blocked beacause of some other constant pin.
If you are very sure that the reset cannot capture value wih other clocks off , then a safe thing can be to declare the reset as a constant pin with its active-state as the value in which the flop are reset.
Once you do this, this pin will not be seen as clock in Tetramax and you dont get the C4 violation
Yes down grading will hit your test coverage. But if there is no way round, then you will have to downgrade the same.
Can anyone provide me with a solution for avoiding clock not able to capture while other clocks are off (C4) violation while attempting to get test coverage with tetramax for a scan inserted netlist.
I have even tried autofixing the clocks while doing scan insertion, but it is not working.