clock tree spec and buffer list

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research235

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Dear all

after placement in encounter, i have some problems with buffers. in the clock tree specification file . i had given the defauls buffers as usable buffers. but during optimisation the some buffers are removed. but actually these buffers are declared as instances in the netlist after synthesis .. can some one tell me how to over come this so that the instances (buffers ) are not removed



suresh
 

during synthesis, you mut specify clock ports as ideal network with appropriate command (like set_drive 0), so synthesis tool does not insert any buffer for these ports.
 

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