Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronic Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Clock Transition violations

Status
Not open for further replies.

raj1435

Newbie level 5
Joined
Mar 19, 2015
Messages
10
Helped
1
Reputation
2
Reaction score
1
Trophy points
3
Activity points
60
Hi,

Can any one explain me about transition violations and How to fix the trans violations. I have specified the max_trans value. But still i am getting the trans violations.

It will be pleasure if some one explain me clearly about the causes and impacts.

Thanks,
raj
 

hoanglongroyal

Member level 1
Joined
Nov 24, 2012
Messages
36
Helped
20
Reputation
40
Reaction score
19
Trophy points
1,288
Activity points
1,480
hi raj,
I'm not an expert on it, but I have somethings to share.
- trans violations might come from big load as the previous pin drive.
- to fix it, I think you need to use a stronger cell (of course you have to trade off timing/power/...) or break number of fanout (to reduce load)
I have specified the max_trans value. But still i am getting the trans violations.
as I know, max_trans do not help you optimize your design, but just a threshold number to see which are exceeded.
 
Status
Not open for further replies.
Toggle Sidebar

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top