Thawra-Kadeed
Junior Member level 1
I have a question please related to the internal power produced by clock network.
I am trying to apply 0 traffic to my design to see how much switching power would consume, which should be so small.
Here in this case I have this results:
Power Group Power Power Power Power ( %) Attrs
--------------------------------------------------------------------------------
clock_network 0.0419 0.0000 0.0000 0.0419 (99.78%) i
register 6.335e-06 4.843e-06 1.968e-05 3.086e-05 ( 0.07%)
combinational 1.356e-05 1.677e-05 3.015e-05 6.048e-05 ( 0.14%)
sequential 7.147e-10 7.233e-10 4.124e-08 4.268e-08 ( 0.00%)
memory 0.0000 0.0000 0.0000 0.0000 ( 0.00%)
io_pad 0.0000 0.0000 0.0000 0.0000 ( 0.00%)
black_box 0.0000 0.0000 0.0000 0.0000 ( 0.00%)
Net Switching Power = 2.161e-05 ( 0.05%)
Cell Internal Power = 0.0419 (99.83%)
Cell Leakage Power = 4.988e-05 ( 0.12%)
---------
Total Power = 0.0419 (100.00%)
And here we see obviously that the internal power is too big because of the internal power of clock network which is not important for me since I have no traffic in the input.
So I used this command: "set power_clock_network_include_register_clock_pin_power false" to get rid from this high Int power value but afterward actually I still have the same value as following:
Internal Switching Leakage Total
Power Group Power Power Power Power ( %) Attrs
--------------------------------------------------------------------------------
clock_network 0.0000 0.0000 0.0000 0.0000 ( 0.00%)
register 0.0419 4.843e-06 1.968e-05 0.0419 (99.86%) i
combinational 1.356e-05 1.677e-05 3.015e-05 6.048e-05 ( 0.14%)
sequential 7.147e-10 7.233e-10 4.124e-08 4.268e-08 ( 0.00%)
And it's clear that the tool moves the value to registers clock internal power. Does any ine have an idea how can I disable the register clock internal power from the output reported power?
Thanks
I am trying to apply 0 traffic to my design to see how much switching power would consume, which should be so small.
Here in this case I have this results:
Power Group Power Power Power Power ( %) Attrs
--------------------------------------------------------------------------------
clock_network 0.0419 0.0000 0.0000 0.0419 (99.78%) i
register 6.335e-06 4.843e-06 1.968e-05 3.086e-05 ( 0.07%)
combinational 1.356e-05 1.677e-05 3.015e-05 6.048e-05 ( 0.14%)
sequential 7.147e-10 7.233e-10 4.124e-08 4.268e-08 ( 0.00%)
memory 0.0000 0.0000 0.0000 0.0000 ( 0.00%)
io_pad 0.0000 0.0000 0.0000 0.0000 ( 0.00%)
black_box 0.0000 0.0000 0.0000 0.0000 ( 0.00%)
Net Switching Power = 2.161e-05 ( 0.05%)
Cell Internal Power = 0.0419 (99.83%)
Cell Leakage Power = 4.988e-05 ( 0.12%)
---------
Total Power = 0.0419 (100.00%)
And here we see obviously that the internal power is too big because of the internal power of clock network which is not important for me since I have no traffic in the input.
So I used this command: "set power_clock_network_include_register_clock_pin_power false" to get rid from this high Int power value but afterward actually I still have the same value as following:
Internal Switching Leakage Total
Power Group Power Power Power Power ( %) Attrs
--------------------------------------------------------------------------------
clock_network 0.0000 0.0000 0.0000 0.0000 ( 0.00%)
register 0.0419 4.843e-06 1.968e-05 0.0419 (99.86%) i
combinational 1.356e-05 1.677e-05 3.015e-05 6.048e-05 ( 0.14%)
sequential 7.147e-10 7.233e-10 4.124e-08 4.268e-08 ( 0.00%)
And it's clear that the tool moves the value to registers clock internal power. Does any ine have an idea how can I disable the register clock internal power from the output reported power?
Thanks