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Clearance from Copper shapes

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prapan

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Hi all !!!

Why is more space recommended between Copper shape to Copper Shape and Copper shape to any other feature (copper feature) on the pcb.

For eg : normal isolation between copper shape to through hole is more than through hole to through hole.


Thank u
 

nelsonys

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May I know where did you get this info?

From my layman point of view, I could only think of the reason that is related to fabrication. As you know there is solder mask layer of 0.1mm approx. larger than each pad to avoid the pad being covered by solder resist, so if your clearance between copper and pad is just 0.15mm, it might somehow post difficulties in manufacturing process to some manufacturers, having to expose some tiny part of the copper.

Correct me if I'm wrong, thanks.

Nelson
 

marce

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I use the same clearence for all copper features, and have never had problems.
 
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praveenlb

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Hi ,

shape to shape required more spacing because it carry high amount of current in that area . it always good to give more spacing between one shape to another shape . minimum 25 mil is recomended
 

FvM

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shape to shape required more spacing because it carry high amount of current in that area
Don't seem to explain anything. How do you see spacing related to current?

I see a possible reason for an increased copper pour to trace spacing when you apply a ground fill but want to limit the circuit capacitance. I agree with marce for the standard design rules, however.
 

Orson Cart

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Some solder resists are specially formulated to give better insulation, and are applied under a quality control program and allow you to run lesser creepage distances on a pcb - for clearance between copper parts in pollution degree II or III environment, it may well be larger than the creepage distance allowed for high performance solder resist between pads on a pcb. Regards, Orson Cart.
 

marce

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Orson, I would be interested in what solder resist will allow the clearances to be reduced, we have always had to apply a conformal coating to the board AFTER it has been assembled, as you also have to cater for component pins as these are exposed metal. Solder resist per se is put on before assembly and as far as I remember with the SELV (low voltage directives) for europe and USA, solder resist has to be discounted when calculating creepage and clearance gaps. Using a solder resist in this fashion means your pads would have to provide the clearance from any exposed component metal!!!!!!!

Regarding clearances from copper to copper, if a manufacturer cannot make what my design requires in this day and age, with the component requirements, then I will go to one that will. With some of todays bottom terminated components requiring both 'copper defined' and 'solder mask defined' pads, you have to use the same design rules for ALL conductive copper shapes.
 

marce

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Cheers for the info.
I presume when applied correctly it will comply with all worlwide regulations.
And between your patronising:) what I was alluding to is why conformal coat twice!
Sorry to go of topic Prapan.
 

prapan

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@ marce - no issues .but i still am confused without any conclusion :) ...Also whats creepage? is it a slot kind of thing provided for isolation ?
 

marce

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For normal copper features, usually ground copper pour, I use the same design rules as I do for any other copper feature.
Creepage and clearance, when used together are references to the Low Voltage Directive:
Low Voltage Directive - Guidelines on application and recommendations - Electrical engineering - Enterprise and Industry
This is a set of rules that determine how far apart copper features must be when carrying high voltage.
From your origional question, where are you getting the clearance figures from?
 

FvM

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It has been clarified, that there is no general reason to have a larger spacing between copper pour than between other copper features. So what are you confused about?

Creepage distance is the spacing between conductors along a surface in contrast to distance in air or in dielectricum. Safety regulations, e.g. IEC 1010 require specific creepage distances according to voltage, pollution level, overvoltage category and other parameters. It applies to copper pour as well as traces and in so far isn't related to your question.
 

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