AA,
Dear Marika:
It sounds that you are new to VHDL, the most important thing to note is that you are describing hardware, so there are some basic differences bewteen HDL and software programming.
You should know that when you wirte "if staement" in VHDL, that means that you are using a multiplexer from the FPGA resources.
However,"if statement" has the same function in both VHDL and software, but there is a basic difference that we call "Incomplete if", I'll just write an example to show the difference..
If (input = '1') then
output = '0'
end if;
this peace of code is more than okay when you write in C, but in VHDL you are using a 2x1 multiplexer that only has one input, that means how should the multipexer behave when intput ='0', so the synthesizer will add a latch to the other intput so that when input = '1' the output will latch the previous value..
If you want to master topics like this you should study the following topic "hdl synthesis" which describes the opertaion of the synthesizer and how our design entry is mapped into hardware.
best wishes for you,
Sameh Yassin
Cairo University