prcken
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Hi, I am doing a 3rd-order 2-bit CIFF DSM, I used Scherier's delta-sigma ToolBox to do the system design, ideally i can get 130dB SQNR with OSR=128. but i found the b1 and c1 coefficients are small so that the capacitors for the 1st stage integrator are very large when doing thermal noise budgeting. for this reason i increased the OSR to 256, this should lead to 149dB SQNR, ideally. but didn't really solve the big cap problem.
Now forget about the cap value first. I did Simulink simulation, i can get more than 20-bit ENOB even with OSR=128. But when I implement it in Cadence with ideal switches, caps and veriloga opamps, the ENOB is less than 15 bits with OSR=256. please see the comparison below.
I used the coefficients got from the matlab, why this two results are not consistent?
Any body has any idea about this?
Thanks!
Now forget about the cap value first. I did Simulink simulation, i can get more than 20-bit ENOB even with OSR=128. But when I implement it in Cadence with ideal switches, caps and veriloga opamps, the ENOB is less than 15 bits with OSR=256. please see the comparison below.
I used the coefficients got from the matlab, why this two results are not consistent?
Any body has any idea about this?
Thanks!