Checking operating regions of each transistor

[design_oriented]

Hi Guys,

I am trying to design a self biased, differential folded cascode opamp and I would like to check the operating region of each transistor in the circuit.

I am using Spectre. How can I do this? Is there any tutorial for this?

Also should all transistors be biased in the strong inversion/saturation region?


Thanks.

 

[erikl]

... I would like to check the operating region of each transistor in the circuit.

I am using Spectre. How can I do this? Is there any tutorial for this?

Do you know the Search function in this forum? It works wonderfully! ;-)
See e.g. this topic, or this one.

Also should all transistors be biased in the strong inversion/saturation region?

In saturation region: yes. But better in moderate inversion.

 

[design_oriented]

Thanks, erikl.
I will try the search function.

 

[design_oriented]

Ok I could see all the regions of operation of the cascode connection shown below.

I have three problems in my simulation:

1. The Von output is higher than the Vop output. How do I match these? Should I play with the lengths and widths of the PMOS devices? I am using NMOS width = 1 um and PMOS width as 2.5 um.

2. In the attached figure, M6,M7,M8,M9 are always off when I run DC simulations. Is that normal?

3. I am getting a gain of about 70. How can I verify if this is correct?

Appreciate your help on this.

 

[erikl]

What's the supply voltage of your design? Are you aware that this circuit needs a power supply of at least 6V in order to work properly?

I have three problems in my simulation:
1. The Von output is higher than the Vop output. How do I match these? Should I play with the lengths and widths of the PMOS devices? I am using NMOS width = 1 um and PMOS width as 2.5 um.

Of course you have to play/calculate on the individual W/L ratios.

2. In the attached figure, M6,M7,M8,M9 are always off when I run DC simulations. Is that normal?

Of course not.

 

[design_oriented]

Thanks for the feedback,erikl.

I have used another circuit for the lower power supply.