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charge sharing effect of domino logic

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promach

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hi, I am having problem understanding the charge sharing effect of domino logic as below:

Why are we having two cases? and what does it mean by delta(Vout) < Vtn ?

Screenshot from 2016-10-11 10-16-30.png
 

is you see the design the input B=0 so there should ideally be no change in the output. But due to charge sharing, there is blip in the vout which is defined as delta vout. The amount of vout drop will depend on the how much is charge sharing is. in simple turns Vtn determines in which region of operation the transistor is.
 

is you see the design the input B=0 so there should ideally be no change in the output. But due to charge sharing, there is blip in the vout which is defined as delta vout. The amount of vout drop will depend on the how much is charge sharing is. in simple turns Vtn determines in which region of operation the transistor is.

Thanks. Please correct me if I am wrong in the following:

Why for case 2: delta(Vout) > Vtn tells us that the nmos is fully on ? I only know that for mosfet to turn on fully (saturation), it needs to satisfy both conditions:
a) Vgs > Vtn
b) Vds > Vgs - Vtn

Please advise what I am missing
 

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