I'm reading up on Type II ( charge pump ) PLLs using PFDs similar to Alexander's PFD for clcok recovery systems.
I would like to know what determines the lock range of such a PLL, or for that matter any bang bang PLL. Furthermore, can this be calculated given circuit topology and parameters.
The lock range is determined by the tuning range of the VCO over which the VCO is linearly tunable and the output of your Phase detector, whether it can tune the VCO over that tuning range. So ideally the lock range would be the smaller of the 2 ranges.
i'm actually trying to model this in verilog-A. So if i use an ideal VCO ( inf linear range abt a central frequency ) and an ideal pump which keeps pumping charge regardless of output voltage then i should get a very large lock range ??
the only limitation being that imposed by the phase detector( which depends on transitions ) to work properly.