iccc
Newbie level 4
stimulations problem
I have designed CDR(clock and data recovery) using PLL with linear PD which is different from binary PD.
After extracted from layout ,the *.sp files are stimulated by Hspice.
All the components of the circuit work well respectively.
But when they constitute the loop, the frequency of VCO doesn't change with the fluctuation of VCO control votage.
Is it close-loop stability problem?By the way,the schematic circuit stimulation is ok.
Any helps are appreciated.
Kurt Lee
I have designed CDR(clock and data recovery) using PLL with linear PD which is different from binary PD.
After extracted from layout ,the *.sp files are stimulated by Hspice.
All the components of the circuit work well respectively.
But when they constitute the loop, the frequency of VCO doesn't change with the fluctuation of VCO control votage.
Is it close-loop stability problem?By the way,the schematic circuit stimulation is ok.
Any helps are appreciated.
Kurt Lee