To my understanding, AXI master and slave must work synchronously. I mean, you "might" be able to double/triple sample those hand-shake signals for each channel(addr/data/response), but in your example, the AXI slave will largely impact the efficiency of the whole AXI architecture.
Can you explain the purpose of your current 100MHz AXI slave design?
AMBA AXI Protocol excerpt:
"ACLK Clock source Global clock signal. All signals are sampled on the rising edge of the global clock.
ARESETn Reset source Global reset signal. This signal is active LOW."