cc1000 TI's transciever oscillator tune

[thranduil]

Hi all guys,

few days ago I designed small boards which is more or less a copy of cc1000 plug an' play reference design for 433 MHz operation. The quartz used in the reference design should be loaded with 18pF and is quite huge, so I changed it for smaller one which requires 10 pF of load. in the data sheet is written that one should calculate load capacitance as following CL = (1/(1/C1+1/C2)) + Cpar. Cpar, ie, parqasite capacitance is stated in data sheed of CC1000 to be usually 8pF. Having this in mind I should put C1 and C2 with arround 4 pF in order to ger 10 pF at the end. In the reference design they didn't use the same value for C1 and C2, but rather something like 18pF and 20pF, which means that they were obviousely tuning this a bit. I would like to tune oscillator in my board also, but I am not sure how to do that. My idea was to measure oscillator frequency and to make it as near as possible to quartz frequency, but with the probes of the scope, it looks quite hard, because of their internal capacitance.
Could anyone suggest me how is this usually done?

Many thanks

 

[FvM]

Instead of tuning the crystal oscillator, why don't you tune the PLL frequency instead?

 

[thranduil]

Hm, I have to put some capacitors as load to chrystal in order to get proper function of oscillator. For that purpose I wanted to ask how is that usually done? How to be sure that oscillator works at specified frequency.
At the moment I am experiencing another problem. I removed quartz for the moment and I am providing external clock signal to the CC1000. CHP_OUT pin is configured to provide reference clock after division. The problem is I always get the same reference divider output frequency, no matter what is external clock frequency. Even If I disconect external clock, reference output has the same value (arround 270KHz).
Does anybody have experience with external clocking of CC1000?