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Can't resolve multiple constant drivers

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EDA_hg81

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error (10029): constant driver at

Code:
process ( refclk, reset ) 
	begin
	    if ( reset = '1' ) then
			vlstart_reg <= (others => '0');
			fpixclk_reg <= (others => '0');
			numline_reg <= (others => '0');
			hpstart_reg <= (others => '0');
			numapix_reg <= (others => '0');
		elsif (rising_edge(refclk)) then
            if( tuner = '0' ) then
			  vlstart_reg <= vlstart;
			  fpixclk_reg <= fpixclk;
			  numline_reg <= numline;
			  hpstart_reg <= hpstart;
			  numapix_reg <= numapix;
			end if;
        end if;   
end process;
------------------------------------------------------
process ( refclk, reset ) 
        
	begin
	    if ( reset = '1' ) then
           tuneack      <= '0';
           tune_state   <= idle;
		elsif (rising_edge(refclk)) then
            case tune_state is
              when idle    =>
                   tuneack   <= '0';
               if ( tuner = '1' ) then
		if(   updwhvsync(0) = '1') then
		 hpstart_reg   <= hpstart_reg - 1;
		elsif(updwhvsync(1) = '1') then
		hpstart_reg   <= hpstart_reg + 1;
--		elsif(updwhvsync(2) = '1') then
--		vlstart_reg   <= vlstart_reg - 1;
--		elsif(updwhvsync(3) = '1') then
--		vlstart_reg   <= vlstart_reg + 1;
		end if;
		 tune_state  <= wtunef;
	 end if; 
         when wtunef   =>
			         tuneack        <= '1';
			         if ( tunef = '1' ) then
			            tune_state  <= idle; 
			         end if;
			    when others   =>
			         tune_state     <= idle; 
			end case;
        end if;   
end process;
I have two processes to exchange and update data based on outside signal “tuner”

when I comment out
-- elsif(updwhvsync(2) = '1') then
-- vlstart_reg <= vlstart_reg - 1;
-- elsif(updwhvsync(3) = '1') then
-- vlstart_reg <= vlstart_reg + 1;

The whole project can be compiled, but when I uncomment

elsif(updwhvsync(2) = '1') then
vlstart_reg <= vlstart_reg - 1;
elsif(updwhvsync(3) = '1') then
vlstart_reg <= vlstart_reg + 1;

Errors are shown as:

Error (10028): Can't resolve multiple constant drivers for net "vlstart_reg[7]" at afefront.vhd(198)
Error (10029): Constant driver at afefront.vhd(178)
Error (10028): Can't resolve multiple constant drivers for net "vlstart_reg[6]" at afefront.vhd(198)
Error (10028): Can't resolve multiple constant drivers for net "vlstart_reg[5]" at afefront.vhd(198)
Error (10028): Can't resolve multiple constant drivers for net "vlstart_reg[4]" at afefront.vhd(198)
Error (10028): Can't resolve multiple constant drivers for net "vlstart_reg[3]" at afefront.vhd(198)
Error (10028): Can't resolve multiple constant drivers for net "vlstart_reg[2]" at afefront.vhd(198)
Error (10028): Can't resolve multiple constant drivers for net "vlstart_reg[1]" at afefront.vhd(198)
Error (10028): Can't resolve multiple constant drivers for net "vlstart_reg[0]" at afefront.vhd(198)


I am confused since “hpstart_reg <= hpstart_reg - 1” and “vlstart_reg <= vlstart_reg - 1” has the same structure. Why no errors are shown when “hpstart_reg <= hpstart_reg - 1” is left without “vlstart_reg <= vlstart_reg - 1”?

Please help….
 

FvM

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error (10029): constant driver at

Generally, any signal, that is assigned in both processes violates VHDL rules. So hpstart_reg also should cause a "multiple constant drivers" error.

But when hpstart_reg is not causing design output (directly or indirectly), the signal is removed from the design during compilation and the error is ignored. Can't be seen from your post, but it's the most likely reason.

P.S.: Providing a complete design example with ports and library specifications is the better way.
 

    EDA_hg81

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EDA_hg81

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can resolve multiple constant driver

Thank you so much.

I see.

I am going to change my design.
 

bbgil

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multiple drivers vhd error

based on my experience with this problem, common cause is that the net is being driven by more than 1 value. Most of my solution is solved by using a multiplexer -sort of function to resolve the data driving the net. check the loops using the variable that has the problem.
 

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