Continue to Site

# can we generate sine wave in fpga without look up tables

Status
Not open for further replies.

#### hulk789

##### Junior Member level 3
can we generate sine wave in fpga without look up tables?

Sure but at what cost and performance specs?
THD =-30dB? or?

What does ROM cost? for ref. and THD?

For bonus points, what is obviously wrong with these waveforms ( taken from a complex Sin/Cos FPGA paper I wouldn't recommend.)

CORDIC can also be used for low-area, high-latency/low-bandwidth applications.

On the bonus, I'm not sure what you think is wrong with the waveforms. The largest error is that sine's domain includes negative values, but the waveform does not. The shape isn't an exact sine wave, but at least it wasn't half-circles.

CORDIC can also be used for low-area, high-latency/low-bandwidth applications.
CORDIC sine generation isn't necessarily low bandwitdh, a sine/cosine wave can be generated incrementally by a complex rotation (two multiply and two add operations). It's a bit tricky to achieve steady state (a constant wave amplitude) with fixed point arithmetics. https://www.edaboard.com/threads/39599/

Sure but at what cost and performance specs?
THD =-30dB? or?

What does ROM cost? for ref. and THD?

For bonus points, what is obviously wrong with these waveforms ( taken from a complex Sin/Cos FPGA paper I wouldn't recommend.)

View attachment 121586

A triangle wave has -18dB THD, a clipped trangle wave has better than -30 dB THD ( i.e. a 5 point wave.)
The waveform above has about -12 dB THD so you can compare the slope to a triangle wave for example.

So when you want to sketch a sine wave, think triangle and round the top.
Fourier Spectrum of the triangle is in the middle.

Hi,

In short: yes.

Do you want this to generate a analog signal?
Or do you need digital data for internal calculations?

One method is to generate square wave or triangle and feed it through a digital low pass filter.

A long time ago I heard of a serial process, similar to those pseudo random generators that use a shift register with combinatorial feedback. If I remember right with something like that is is possible to generate sin wave data.
But I don' remember the name, nor how it exactely was made.

Klaus

Was trying to do some numbers on this,

In the case of a first (2nd) order bandpass filter. The fundamental harmonic is suppressed by 6dB's.
If you feed a triangle wave into it, the 3rd harmonic is at 1/9th so, at a level of 0.1111x... (originally).
The goal would be to get it at -127dB, a level of 4.24e-7.
What the bandpass filter did to the signal, is reduce the 3rd harmonic by -18dB.
Effectively dividing 0.1111x by 4 giving a 3rd harmonic of 0.02777x.
So to suppres the 3rd harmonic below -127dB you'd need an 8th order filter, giving you 1.52e-7.

If i'm not mistaking.. again..

- - - Updated - - -

edit: 9th @ 4.23e-7. :bang:

Last edited:

Unless Hulk defines his requirements more clearly, clearly there is no solution.
There are many applications that don't need a sine wave with 60 dB SNR or even 40dB for that matter.

From DSP experience, for an audible sine. i'd try to embark on a bandpass filter, and cycle it a couple of times to see if you can get to the point where you'd want to be with tolerable ringing. And use it on the triangle wave. (If dead set on not using a lookup table?) Pro's the phase is spot on, and it can be fully recovered bitwise. If you're not to keen on doing "floating point DSP in your HDL of choice :razz:" you might want to try finding a Butterworth filter and setting it for a higher Q factor?.

If you need the sine gen. to be synth then ignore my post, else read on.

Many years ago I did it using Maclaurin series up to 3 terms. The maximum error percentage between the actual sine function and its MacLaurin series presentation (implemented with my VHDL) was found to be 0.99%
But I didn't write a synth. VHDL code as it was to be used only for simu. purpose. You may try the modification!

Hint: You need to implement the formula below in your HDL
f(x) = Sign (i.e. + or -) * Signal_Amplitude * [x - {x^3/6} + {x^5/120}] + Offset

Status
Not open for further replies.