can someone please explain the concept of weak 0 and weak 1?

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ms_90

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i know that PMOS is used for getting strong 1 and NMOS for getting strong 0. Also, if w will use NMOS as pull up it will only b able to pull the output upto vdd-vt and in case of PMOS in pull down it will be vss+vt. so can someone please explain this voltage changes at device level with respect to the working of MOSFET or please suggest any suitable links or documents to read.


thanks in advance
 

thanks yadavvlsi...
i already know it...but i want to know exactly that how the voltage will be vdd-vt and vss+vt ?
can you please explain it?
 

thanks...now i got it...
 

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