Most importantly, the level shifters should be characterized for speed. Since, the lower voltage inverters need to drive a cap load in the high voltage domain, we need to look into the loading on them. The propagation delay depends on the following factors :
1. Sizing of the second inverter.
2. The latch sizing (PMOS transistors in High VDD domain)
3. Output buffering in the high voltage domain.
--- One small thing, the latch could go in an indeterminate state when the power supply is ramped. Hence it wil leak current in rampup/ shutdown. So, you need also have to come with a figure for this.