Can anyone give me advices of the clock in USB.

[xiongdh]

Can anyone give me advices of the clock in USB device.
My USB device support full speed and low speed and has no external crystals oscillator but a internal crystals oscillator.
Can you give me some informations ,url link and advices about clock recovery,DPLL,and oversampling.

 

[ttspice]

Most USB 1.1 device follows the SIE VHDL model released from Intel in 1995, It uses 48MHz clock to oversample 12MHz (full speed) signal. I remember they have a white paper of SIE to explain the algorithm, you can try to search it on internet, somehow it's a very old stuff...

The clock recovery is a state-machine to watch the edge of input signals like most DPLL does. SIE stands for Serial Interfec Engine.

 

[xiongdh]

thanks.
Do you mean the paper "Desiging A robust USB serial interface engine(SIE)" ,I haved find this file.
But I can't find the SIE VHDL model.Who can give me one.
thanks my mail:dehuixiong@sohu.com

 

[cqjhq]

Hi dehuixiong,
Can you share your file?
thanks my mail:cqjhq@163.net

 

[xiongdh]

Hi dehuixiong,
Can you share your file?
thanks my mail:cqjhq@163.net

I sent it to you.

 

[kjhgkj]

Phoenix USB Verilog sources available

If anybody wants them, PM me.