Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

can any one tell me meaning of RECT 0.625 0.285 0.735 0.750

Status
Not open for further replies.

arunkumar446

Full Member level 3
Joined
Jul 9, 2008
Messages
168
Helped
6
Reputation
12
Reaction score
3
Trophy points
1,298
Activity points
2,198
can any one tell me meaning of RECT 0.625 0.285 0.735 0.750 in .lef file format
 

Re: can any one tell me meaning of RECT 0.625 0.285 0.735 0.

RECT a b c d

means

rectangle whose diagonal co-ordinates at (a,b) and (c,d).
if u know 2 diagonal points of a rectangle , other 2
points are obvious ( since rectangle has 4 co-ordinates)
i.e (a,d) and (c,b) .

u can take paper and pencil and draw a rectangle for
your coordinates to better understand it.
 
Re: can any one tell me meaning of RECT 0.625 0.285 0.735 0.

Thank you for the reply.

can you tell me the difference between abstract view and layout view

and at which stages of asic design flow are they used and in which format will these libraries be.
 

Re: can any one tell me meaning of RECT 0.625 0.285 0.735 0.

Hi,

Abstract view is generated from layout view when we want to output the LEF file i.e. LEF file is created according to the abstract view.
LEF can then be read in when using a P&R tool (at the start when importing the design). The layout & abstract view is not used by the P&R tool.

The reason layout view is not used by P&R is due to the amount of memory needed to handle all the layers. In other words, the LEF file is just a simplified model of the layout so the P&R tool can work.

So, layout -> analog design, LEF -> digital design.

Best regards.
 
Re: can any one tell me meaning of RECT 0.625 0.285 0.735 0.

Thanks for the information cop02ia

When final GDSII is generated it will have all layer information, is it?
if so the layout view should be given as input, right.
when DRC checks are run after place and route, does it do checks only from M1 to so on, and doesn't check base layers as lef for abstract view doesn't have that information.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top