[SOLVED] calling modules from different .v modules

[muzammil007]

Hi guys,

I have this doubt. If we have two different files with different verilog code, is it possible to call those modules in some other
program ? let's say I have a file counter.v which works as a simple counter and another verilog file called decoder.v. Can i create a third
verilog code and call my above two modules in this program ?
Can it be done ?

Regards
Maxx

 

[Mina Magdy]

yes it can

example

if the file decoder contain a module decoder with i/p's in1,in2 and o/p out1,out2 

decoder D1 (in1.(A),in2.(B),out1.(C),out2.(D) );
simple_counter C1 (in3.(E),in4.(F),out3.(G),out4.(H));

 

[permute]

It may be more important that you realize that you are not "calling" modules, but rather "instantiating" them. The difference is that you will be creating physical hardware in terms of LUTS (FPGA) or gates (ASIC) for each time you "call" the module.

This becomes important when you run into cases where complex, but rarely utilized modules are needed. The complexity means a higher amount of LUTs/gates are used -- even though the modules are only used for a small fraction of time.

 

[muzammil007]

The problem is solved !!
If anybody needs a solution..reply here and i will post it..

Cheers
maxx