Calibre RC extraction question

pbs681 said:

Hi,
Currently I am running post layout simulation for my ring osc. I did 2 different parasitic extraction. First is C only and the second one is RC. Then I run the simulation to find the gate delay of the gate. The problem is, the results from RC extraction simulation is faster than C only extraction. The difference is in the factor of 2. I think, simulation with RC should be slower than C only. I don't know wheter my layout or the extraction deck that has problem...... . Any idea?

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cougar168 said:

pbs681 said:

Hi,
Currently I am running post layout simulation for my ring osc. I did 2 different parasitic extraction. First is C only and the second one is RC. Then I run the simulation to find the gate delay of the gate. The problem is, the results from RC extraction simulation is faster than C only extraction. The difference is in the factor of 2. I think, simulation with RC should be slower than C only. I don't know wheter my layout or the extraction deck that has problem...... . Any idea?

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Generally, it is true that RC is slower than C only ...

But, there is exceptions, please compare the netlist with extracted parasitics...

If you post it, I can take a look

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