I am new to calibre and I am facing a problem about "missing inductor" and I have been trapped for a while.
At the very beginning, I was about to build a basic LC based bandpass filter layout. When I pass the DRC, there is a problem in my LVS with missing inductor. So I built a series basic LR circuit to prove that problem generates from "missing inductor". Likely, it happens again in my LR circuit.
The rest are my lvs repot screenshot:
As you can see, the source netlist file from schematic shows the inductor works. However, .sp file of layout shows inductor is a bad device and missing.
Look to your extract rules, the part that "should" recognize
inductors. It probably wants some specific not-normal
features tp do its job, because there's no real difference
between an inductor and a very stupidly drawn interconnect
route when you get to the bottom of it.
I've seen marker layers used to tell extract tool that some
particular patch of metal is an inductor. If you don't put
it, then you get a short end-to-end and no element.