1. If you are applying a linear (in time) voltage ramp, the current should be constant over time - why is it varying over voltage (time) in your case?
2. What is that element X0?
3. Parasitic prober show you only parasitic capacitance of nets.
When you do circuit simulation, you will see the impact of device related capacitances - such as capacitance of the body of resistor R0, and element X0, that's why measured / simulated capacitance may be larger than the parasitic capacitance of the net.
4. In my opinion, the best way to simulate capacitance, is to apply a small-signal AC voltage top the input port, and measure current. Imaginary part of the current is i*omega*C*Vac.