Calculate overflow flag

[tarjina]

I am trying to implement add ALU in verilog.
I have to set the overflow flag from addition.
What I have got from googling is, if the operation is carried on 2's complement,
overflow = c(i) xor c(i-1)

But, my confusion is as follows:

let's say I am adding 16'hFFFF + 16'hFFFF
so, i should get an overflow =1.
but, according to overflow equation, c(14) =1 and c(15) = 1. So overflow would be zero. But then how do I get the overflow.
Thanks in advance.

 

[K-J]

Simply perform the addition with an extra bit. That extra bit will then be the overflow bit.

Example:
if A and B are both 16 bit numbers, then define S as a 17 bit number and calculate S = A + B. S(16) will be the overflow bit.

Kevin

 

[tarjina]

Hi K-J,
thanks for replying. But can you please explain the theory behind it?

 

[dave_59]

K-J's answer is correct for unsigned arithmetic, but not for signed or 2's-complement. For signed arithmetic, you are checking that the sign of the truncated result matches the sign without truncation. That is what the xor operator is doing.

 

[tarjina]

Hi,
I am just getting more and more confused.
Is there any general formula for calculating overflow that would work for signed and unsigned, addition and subtraction.
If possible, please an example with explanation would be really appreciated.
TIA.

 

[ads-ee]

It depends on the operands being unsigned or signed. Using 4-bit addition as an example.

Unsigned: Make a carry bit, for 4-bit numbers make a 5th bit and that is the overflow bit.
e.g.:
7+8 = 15, okay
0111+1000 = 0_1111 (5-bit value)
8+8 = 16, overflow
1000+1000 = 1_0000 (5-bit value)

Signed:
Overflow can only occur when: A+B=C or -A+-B=-C (add two positives, or add two negatives)
If the sign of the result changes you have an overflow (A,B,C all have the same width)
-1+-8=-9, overflow for 4-bits
1111+1000=0111 (oops this is +7)
7+1=8, overflow for 4-bits
0111+0001=1000 (oops this is -8)

so overflow = ~(a[3] ^ b[3]) ^ c[3]
~(a[3] ^ b[3]) checks if sign bits are the same
.... ^ c[3] checks if the sign changed.

- - - Updated - - -

Oh, and if you use the rule mentioned earlier (where you used the wrong bits) then you sign extend the 4-bit A & B inputs to 5-bits and truncate the addition to 5-bits:

-1+-8=-9
11111+11000=110111 (XOR the bits in red =1 overflow)

7+1=8
00111+00001=001000 (XOR the bits in red =1 overflow)

-2+-4=-6 (should be okay...prove it)
11110+11100=111010 (XOR the bits in red =0 okay)

 

[std_match]

The overflow bit is not used for unsigned operations. The software will just ignore it,
so it can always be set as if it was a signed operation.

This means that the ALU logic doesn't need to know if an addition/subtraction is signed or unsigned if both carry and overflow bits are generated.

Read chapter 5 in the following book:

https://dev-docs.atariforge.org/files/Asm_Lang_Prog_68K_Family.pdf