Cadence Virtuoso Load pull

Status
Not open for further replies.

Liakos

Newbie
Joined
Jun 12, 2021
Messages
1
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
12
Hello. Im designing a PA at 2.4Ghz with virtuoso from cadence. Having the Pout,pae,input match and everything else i procceeded to do load pull for the output match with the use of the portAdapter. After simulating i saw a warning that the R from the portAdapter is negative for some values of theta, more specifically for theta=90 to theta=180. I changed the dimensions of my transistor/s, my bias , the values of my dc blocks and dc chokes and the values from my input match but it stays the same.Do you guys have any idea what is happening??

thanks
 

Status
Not open for further replies.
Cookies are required to use this site. You must accept them to continue using the site. Learn more…