Cadence: Seperate cell views' subcircuit can work, but put them together cannot work

[bhl777]

Hi All, I have two subcircuit for a bandgap reference circuit design. One is PTAT and one is CTAT. When I originally designed, I put these two subcircuit seperately in different cellviews and both of them are working well. The power supply of both circuits are the same.

But when I copied and placed them in the same cellview, and just make their Vdd and GND the same. Without connecting anything between them, some malfunction happened in PTAT circuit and CTAT circuit.

I am curious why this happened. The sketch is like this picture. Could anyone advise about this? Thank you very much!

 

[dick_freebird]

You could start with just what "didn't work" means. A result
you didn't like, or failure to produce a result at all?

bandgap / PTAT loops without explicit startup mechanisms,
can easily converge in one testbench and fail in another,
because when they start up they're doing so on "numerical
noise" which depends on the circuit matrix and algorithm
for what goes on between initial state and convergence.

 

[bhl777]

Hi dick_freebird, what I mean is in the seperate cellviews, I have some DC points in PTAT and CTAT, that is good for making the subcircuit work. For example, a PTAT has an opamp inside, and over all temperature, V+=V-.
However, when I copied them to the same cellview, even if there is nothing connect with each other, these DC point has been changed, and some malfunction happened. For example, the two inputs of op amp are not equal now.
(1) Do you think even in the simulation,the start up mechanism also matters?

(2)There is one thing that may cause this problem. I have op amp symbol(created from another individual cellview) of both circuit, and both of them came from that cellview. Do you have an idea about this?

Thank you very much!

You could start with just what "didn't work" means. A result
you didn't like, or failure to produce a result at all?

bandgap / PTAT loops without explicit startup mechanisms,
can easily converge in one testbench and fail in another,
because when they start up they're doing so on "numerical
noise" which depends on the circuit matrix and algorithm
for what goes on between initial state and convergence.

 

[dick_freebird]

You might look at whether any top level shorting of pins
(e.g. bias nodes) is jacking the operating point somehow.
And this is not a bad place to begin, generally - look at
the things that have changed between solo and tandem
circuits.

I don't understand "V+=V-". In absolute terms, that would
mean a zero power supply on the amplifiers.

Seems to me this wants poking more than advice.