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Cadence RCX extraction error

ahdzlqkdzl

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Hi guys.
I'm using cadence virtuoso for the TSMC 28nm manufacture.

and there weren't problem until I finished DRC and LVS test. but when I tried PEX, I faced over 150 warnings and couldn't extract any resistance or capacitance,

these are my error pictures. and some of them are usual warnings I've had before( I didn't have any problem to PEX when I used 65nm manufacture).

if you guys had same problem with me or there are someone who knows helpful advice, please give me.

I really appreciate for your reading !error1.pngerror2.pngerror3.png
 

Dominik Przyborowski

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You have wrong layer map definition. Ensure configuration for process and metal stack. There might be also some magic steps needed, mentioned in PDK documentation.
 

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