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Cadence Layout - How to generate bitslices from smaller instances

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killersquirel11

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Hey all,

As part of a class project, I have to create a sixteen-bit (8x8) multiplier. For many of the sections involved, I have been working on the single-bit components. What I have then been doing is instantiating the single-bit components sixteen times, and the pins for the higher-level module by hand on top of that. Is there any way to do this automatically, or at least with less user-input/error? My instructor has been less than helpful in this, and I am starting to think that he might not know how to do something like this.

(for example, I need to create a sixteen-bit-wide bitwise XOR gate. What I do now is instantiate sixteen of those XOR gates (stacked vertically), and then draw each of the A,B, and X pins for each XOR gate. I feel like it should be possible to place one XOR gate, tell Cadence where the pins go, then tell it to duplicate it fifteen times, putting each one 100nm (or whatever the actual number is, just pulled that one from my arse) above of the one before).

Thanks in advance.
 

Within C@dence you can instance either (e.g.) 16 instances over each other as (e.g.) XNOR2<15:0> and connect their pins via buses, or you can instance arbitrary x-y arrays of instances with arbitrary distance from each other.

Suggest to read the corresponding docu.
 

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