syedshan
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hi all,
Can I use RAM from Xilinx Core as a cache...any idea...
I know this might be silly to ask but believe me i am in urgent need for this.
Although studied cache during my undergrad, but now I dont need HARD-CORE CACHE that can perform The Best.
Also I don't exactly remember the details of cache. (please do comment if the method I propose act as one)
I just need to take data from the DDR3 and store in a memory then read, since Data from DDR3 is in 8-continuous chunks form, and I need in my algorithm only the similar chunks of each...Hence I need some memory, (FIFO wont help at all.)
The idea is actually like this. that for e.g I generate address and get 8-chunks and this I get for X*Y times.
Hence I store these X*Y in memory and 1st data of each chunk correspond to each other, then second to second of others, third to third of others, unless all eights are utilized,
Then I will reset the address of this RAM (or our little so-to-be-cache) and deliver the address for [ (X*Y) + 8] memory location of DDR3, then repeat it all over.
You can consider the following image( just the pictorial of what I want to convey)
In actual, It is a video and you can consider each XY-plane as 1 frame of the video (actually it is like that !!!)
Eagerly waiting
Thanks
Can I use RAM from Xilinx Core as a cache...any idea...
I know this might be silly to ask but believe me i am in urgent need for this.
Although studied cache during my undergrad, but now I dont need HARD-CORE CACHE that can perform The Best.
Also I don't exactly remember the details of cache. (please do comment if the method I propose act as one)
I just need to take data from the DDR3 and store in a memory then read, since Data from DDR3 is in 8-continuous chunks form, and I need in my algorithm only the similar chunks of each...Hence I need some memory, (FIFO wont help at all.)
The idea is actually like this. that for e.g I generate address and get 8-chunks and this I get for X*Y times.
Hence I store these X*Y in memory and 1st data of each chunk correspond to each other, then second to second of others, third to third of others, unless all eights are utilized,
Then I will reset the address of this RAM (or our little so-to-be-cache) and deliver the address for [ (X*Y) + 8] memory location of DDR3, then repeat it all over.
You can consider the following image( just the pictorial of what I want to convey)
In actual, It is a video and you can consider each XY-plane as 1 frame of the video (actually it is like that !!!)
Eagerly waiting
Thanks