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buried layer in BiCMOS process

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yingt2704

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BJT in BiCMOS process, used buried P+ implant layer ,buried N+ implant layer & buried N- implant layer. I wonder why use these layers, what's the effect of them?
 

Buried P+ is rare but buried N+ is found in nearly every mature BiCMOS. For CMOS it helps to reduce the parasitic resistance so that the triggering current for the thyristor effect in a latchup situation is reduced. For the vertical NPN the lateral resistance of collector is reduced. So the collector resistance is the path from the PBASE/NWELL depletion vertical through NWELL down to the N+BL, then lateral through N+BL to the typical deep N+Plug, then vertical upside through N+Plug to the collector N+ contact diffusion.

Buried P+ indicate a true complementary bipolar process where both NPN and PNP is vertical.
 

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