Not necessarily. A PMOS FET with comp cap wrapped
D to G can amplify (not just fail to attenuate) supply
ripple. A NMOS pass FET requires the gain to be had
elsewhere (P pass FET contributes a significant gain
but that's also quite variable w/ load-point, headroom
and so on, making "quick and dirty" loop compensation
a trap).
DC PSRR is one thing. HF PSRR is another and some
designers may not pay attention to this application
"care-about" which doesn't always (in the past, never)
show on datasheet electrical tables. Yet HF PSRR is
what point of load LDOs are supposed to fix, in a lot
of design-ins.