Buck dc/dc converter 's problem

[sorata]

HI,all
I am implementing a buck dc/dc converter, voltage-mode. The wave of Vout should act as Figure 1(by Matlab model) . but in my circuit implementation, the Vout starts with high voltage , then oscillates as Figure 2(by circuit implementation).
any instructions is welcome,thanks!

add conditions: the input is 5V dc voltage, i want to get 1.2V vout. I simulated the circuit with no load current. and the feedback voltage is scaled to 0.8V for the negative input of error amplifier. The ramp signal is showed in Fig 2(/ramp).


br,

Figure 1

Figure 2

 

[max0412]

I' m confused I see no overshoot or oscillation's in fig2 (Cadence analog design environment) are these your captured waveforms of your physically implemented cct? They look simulated I don't see a switching ripple on your /out (v/out ).

I f your talking about an overshoot at start-up,or during a line transient this is normal. No control loop will respond instantaneously (line /load transients),if you devise a way to do this patent it your rich. For start up overshoot look into soft start cct's.

 

[DenisMark]

I think that the initial dc solution for transient simulation correspond to initial closed p-switch. Try to set input signals for initially closed n-switch.
In cadence u can make dc simulation with saving dc operation point, than annotate operation condition and node voltage thus u can find where is wrong condition though the circuit.

 

[jwfan]

what is your input, output, and load conditions? looks like that the compesation of your circuit is not good.

And what is your Ramp signal? sawtooth wave for duty cycle generator

 

[sorata]

I' m confused I see no overshoot or oscillation's in fig2 (Cadence analog design environment) are these your captured waveforms of your physically implemented cct? They look simulated I don't see a switching ripple on your /out (v/out ).

I f your talking about an overshoot at start-up,or during a line transient this is normal. No control loop will respond instantaneously (line /load transients),if you devise a way to do this patent it your rich. For start up overshoot look into soft start cct's.

Thanks first,
yeah,Fig2 is from my implemented circuit. Actually, the Vout should rise slowly then an overshoot happens . But my problem is that the Vout is started with High voltage after the P-mos switch is turned on instantaneously. I confused with that.

Added after 5 minutes:

I think that the initial dc solution for transient simulation correspond to initial closed p-switch. Try to set input signals for initially closed n-switch.
In cadence u can make dc simulation with saving dc operation point, than annotate operation condition and node voltage thus u can find where is wrong condition though the circuit.

Thanks for your opinion.
I use p-mos switch for charging the inductor, low gate voltage("a_" in Fig 2) turns it on. Vout should rise from zero, right?

Added after 13 minutes:

what is your input, output, and load conditions? looks like that the compesation of your circuit is not good.

And what is your Ramp signal? sawtooth wave for duty cycle generator

I feel sorry that i didn't mention the conditions.
the input is 5V dc voltage, i want to get 1.2V vout. I simulated the circuit with no load current. and the feedback voltage is scaled to 0.8V for the negative input of error amplifier. The ramp signal is showed in Fig 2(/ramp).

I kind of agree with you, maybe i didn't have a good compensation method,or right method.

and I will simulate the converter without feedback control loop, with ideal pluse waveform to control the pmos and nmos switch .

Added after 1 hours 45 minutes:

And i simulated the buck converter without feedback control loop.

here is the Figure of schematic and waveform.
conditions: input=5v,ideal pulse's duty cycle=0.24,output=5V*0.24=1.2v,
Iload=0, L=2.2uH,C=22uF

as shown in Fig2, the Vout starts with High voltage , then oscillates to a stable voltage(1.2v), is that right response from the buck converter?

but the waveform from Matlab model shows that the Vout rises from zero, the oscillates to a stable voltage after an overshoot.

as i see in some converters' datasheets, the waveform from Matlab model is the right one. so I am confused about the waveform from the implemented circuit as shown in Fig2.

Fig1

Fig2

 

[Btrend]

1. in Matlab ur switch is on with logic "1", and off with logic "0".
But in your circuit, ur pmos will be on with logic "0" at your initial state, which make the output = input, that's why you got a high (5V) in the initial stage.
2. u need a soft start control, and usually high side and low side switch will not behave "simple inverse mechanism" as in your circuit. shoot-through current
& dead time control should be careful design.

 

[sorata]

1. in Matlab ur switch is on with logic "1", and off with logic "0".
But in your circuit, ur pmos will be on with logic "0" at your initial state, which make the output = input, that's why you got a high (5V) in the initial stage.
2. u need a soft start control, and usually high side and low side switch will not behave "simple inverse mechanism" as in your circuit. shoot-through current
& dead time control should be careful design.

so you means that in the circuit implementation, if the power switch's initial state is "ON", Vout will be High voltage immediately at first ?

Thank you!

 

[DenisMark]

I agree with Btrend and give ur one more advice. For prevent decreasing converter efficiency control pulses for p-mos and n-mos switches must be non-overlapping. Usually thier are provided through rs latch, r and s are complementary.