njadav
Newbie level 2
I need BPSK Demodulation as per the attached reference paper for Stratix III board in Altera Quartus II. I can pay reasonable amount for this activity to some expert developer.
Following is some information from my developer:
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1.
We make BPSK modulation at 1200 bit rate. For getting 1200 bit rate we convert 125 MHZ crystal from FPGA, then using PLL megafunction clk is converted in 120 Mhz. then we divide 120 Mhz clock/1200=100,000. So after every 100,000 count we fetch one bit from ROM table by incrementing address of MIF file and if bit 1 is coming positive sine
wave is generate and when 0 is coming negative sine wave is generated. 10000 samples of sine wave is generate using Matlab and then store in another ROM table.
This is Basic description of Modulation.
2. In demodulation 50000 samples of 5 Modulated bit is generated and stored in to ROM using one mega function. And then detection logic is created. If value of sample is >8191(2^13-1) then bit is 1 else bit is 0.
3. Change: In this demodulation only 5 bits are detected. Not demodulated.
4. What I want to make BPSK demodulation using same logic of attached document dmod.pdf. And want to get output as given in domd.pdf
5. Main important thing is when I get demodulated output according to modulated pattern on oscilloscope value of output frequency should be 1200Hz.
6. I want out put in continuous mode means I store 1200 bits in ROM table in data pattern should be demodulated for 1200 bits continuously. Means whatever no of bit I have taken in input should be demodulated in output.
7. We can also use mega functions provided by Altera in programming demodulation.
======================================================================================================================
Thanks for reading...
Following is some information from my developer:
======================================================================================================================
1.
We make BPSK modulation at 1200 bit rate. For getting 1200 bit rate we convert 125 MHZ crystal from FPGA, then using PLL megafunction clk is converted in 120 Mhz. then we divide 120 Mhz clock/1200=100,000. So after every 100,000 count we fetch one bit from ROM table by incrementing address of MIF file and if bit 1 is coming positive sine
wave is generate and when 0 is coming negative sine wave is generated. 10000 samples of sine wave is generate using Matlab and then store in another ROM table.
This is Basic description of Modulation.
2. In demodulation 50000 samples of 5 Modulated bit is generated and stored in to ROM using one mega function. And then detection logic is created. If value of sample is >8191(2^13-1) then bit is 1 else bit is 0.
3. Change: In this demodulation only 5 bits are detected. Not demodulated.
4. What I want to make BPSK demodulation using same logic of attached document dmod.pdf. And want to get output as given in domd.pdf
5. Main important thing is when I get demodulated output according to modulated pattern on oscilloscope value of output frequency should be 1200Hz.
6. I want out put in continuous mode means I store 1200 bits in ROM table in data pattern should be demodulated for 1200 bits continuously. Means whatever no of bit I have taken in input should be demodulated in output.
7. We can also use mega functions provided by Altera in programming demodulation.
======================================================================================================================
Thanks for reading...
