Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

bootstrapped switch design

Status
Not open for further replies.

Alice Lee

Newbie level 5
Joined
Sep 28, 2022
Messages
9
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
229
Hi, everyone. I tried to design a bootstrapped switch whose resolution is 13b. the sampling frequency is 100MHz, the input signal frequency is 1.27MHz. And i took this paper as reference.
B. Razavi, "The Design of a Bootstrapped Sampling Circuit [The Analog Mind]," in IEEE Solid-State Circuits Magazine, vol. 13, no. 1, pp. 7-12, Winter 2021, doi: 10.1109/MSSC.2020.3036143.
I'm so confused that if the amplitude of the input signal is small(e.g. 100mV) then the sampling capasitance should be very large(~hundreds pF), it's not practical,is there another structure can solve this problem, or am i wrong?
 

The kT/C noise is just there independent of your input amplitude. So if you want to sample something really small then yeah you need to handle large caps unless there's something else you can change in the architecture.

There are two ways around it that I can think of. First is using an amplifier with low noise so that the signal is larger. If you're handling really small signals, you may want to have an amplifier anyway because at 100MHz rate, you'd be loading your input quite a bit so it's not a huge loss to gain it up a bit. Second way is addressing the issue with other techniques. There is this paper that I remember from some time ago, but to be honest it's been a while since I read it so I don't remember it well. It may still provide a starting point. https://ieeexplore.ieee.org/document/6814935 The main point is, there are some techniques that can be used conditionally.
 

The kT/C noise is just there independent of your input amplitude. So if you want to sample something really small then yeah you need to handle large caps unless there's something else you can change in the architecture.

There are two ways around it that I can think of. First is using an amplifier with low noise so that the signal is larger. If you're handling really small signals, you may want to have an amplifier anyway because at 100MHz rate, you'd be loading your input quite a bit so it's not a huge loss to gain it up a bit. Second way is addressing the issue with other techniques. There is this paper that I remember from some time ago, but to be honest it's been a while since I read it so I don't remember it well. It may still provide a starting point. https://ieeexplore.ieee.org/document/6814935 The main point is, there are some techniques that can be used conditionally.
Thanks a lot
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top