Welcome to our site! EDAboard.com is an international Electronic Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
blocking statemnest are used to model combo logic and non blocking for modelling sequential logic.
If use it wrongly synthesised logic will still be correct, but there will be mismatch between functional simulation and post synthesis simultaion.
as a general use
blocking for combo and non blocking for sequential
there us no need to mix the statments . Don't mix