N1UL said:In the DC circuit, the PNP transistor samples the DC current up to some offset, and within the loop gain and bandwidth compensates this. The third transistor act as a temperature stabilizing diode. It inverts the voltage drop at the output, including the noise by -180 deg and feeds it back so canceling these contributions to some high degree
Hi,
it seems you missed most of the subject
The circuit Ulrich posted here serves in stabilising the bias of the oscillator transistor. As the oscillator transistor also is the part that limits the amplitude, the amplitude variations are also minimised by this circuit.
Regards,
Schmocki
Oh, sure, but I cannot find the circuit....
Regards,
Herb.
You might wish to study the theory more. If you have an oscillator with phase noise X at 155 MHz, and oscillator with the same phase noise at 11 MHz will need to be 23 dB better. 20 Log N, resonator Q(f), etc, ya know.
This is what I mean. My FET-oscillator (with 7 components) is only 10 dB worse than the rather complicated one of Ulrich.
BTW I know the theory already for about 50 years.....;-)
Regards,
Herb.
I am not sure we are getting thru the language barrier. Build your fet oscillator at 155 Mhz, measure its phase noise, and then brag about it!
Anyone can build a good oscillator at 11 Mhz, where crystals are available with unbelieveable Q's.
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