bitline capacitance calculations for SRAM

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Ashvinikumar

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i am using 90nm PTM model for SRAM design and want calculate the bit line capacitance for which we have to find out the drain terminal capacitance of access transistor now the model file has cgdo = 1.9e-010 and cgdl = 2.653e-10,so my question is what these capacitance's actually mean and which value should i take for calculations?
please help...thank you in advance
 

Find here the "official" BSIM definitions and calculation method for the gate-drain overlap capacitance (if capMod is set to 1), so you may decide how to use these values.

Be aware that these values are given as capacitance per unit channel width, i.e. in units of [F/m].
 
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