bidirectional bus problem

[fatihtir1]

Hello all,

Could you please tell me the difference between two lines below:

sram_da <= write_data when (sram_read='0') else "ZZZZZZZZZZZZZZZZ";
sram_da <= "ZZZZZZZZZZZZZZZZ" (sram_read='1) else write_data;

I used the first line for reading from sram, but simulation didn't showed expected result (i have an sram vhld model also). After long hours of examination and trying, when i replaced it with second line, it was ok. But I can't understand why the first line is wrong.

I appreciate your help.

Regards.

 

[std_match]

The lines should give the same synthesis result, but they can behave differently in simulation if "sram_read" has a value like 'L', 'H', 'X', 'U', '-'.

 

[K-J]

Hello all,

Could you please tell me the difference between two lines below:

sram_da <= write_data when (sram_read='0') else "ZZZZZZZZZZZZZZZZ";
sram_da <= "ZZZZZZZZZZZZZZZZ" (sram_read='1) else write_data;

I used the first line for reading from sram, but simulation didn't showed expected result (i have an sram vhld model also). After long hours of examination and trying, when i replaced it with second line, it was ok. But I can't understand why the first line is wrong.

I appreciate your help.

Regards.

Most likely the signal 'sram_read' is an active high true signal from the perspective of whatever is driving 'sram_da'. Assuming the code you posted is from something that is trying to drive the SRAM, then your signal naming convention is kind of bonkers. Your design would want to drive the SRAM data bus when it is writing, not when it is not reading. I would write it like this...
sram_da <= write_data when (sram_write='1') else "ZZZZZZZZZZZZZZZZ";

Kevin Jennings