Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Biasing two stage amplifier

Status
Not open for further replies.
Hi Siddhartha,

My professor recently gave us a two-stage opamp schematic with PMOS input pair to design. Most books and videos deal with NMOS input pair. However, for a PMOS input pair, I'm a bit confused on how to get the equations for the Vin(max) and Vin(min). I tried solving for Vin(max) and the equation I get for Vin(max) is Vin(max) <= Vgs3 - Vth1(max). I know this equation is wrong. Could you enlighten me on this please?

Also, on your post below, you mentioned something about having the upper range of ICMR for PMOS input pair in reverse, and it made me more unsure about my equation. What do you mean by this?

4. Now approaching the saturation condition of M2 i.e the input differential pair.
This is restricted by the upper range of ICMR ( for PMOS input pair its just the reverse)
 

Hi, Kriz
You can refer the Microelectronics Circuit by Sedra and Smith in which you can find out the Two stage CMOS opamp with PMOS differential input pair ( Chapter: Oparational Amplifier and Data Converter Circuit ). By the way It is quiet easy to find the ICMR range.
For Max input traverse from Vdd to Vin and try to make Vin maximum, hence Vds = Vdsat.

For minimum Vin traverse from Vin towards Vss/ GND. To make Vin minimum, ensure that all MOSFET in this path are just in saturation i.e. Vds = Vdsat.
 
Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top