Bias values for the circuit shown

[blowfish]

Hai,

Can anyone tell me the exact bias values to be given for the circuit posted in the figure .

The bias inputs are

1.Bias1.

2.Bias2.

This is a charge pump circuit used in PLLs and DLLs.Also i require the model graph or model output results for the charge pump circuits.

 

[pfd001]

The bias voltage should be made the connected transistor to work in the saturation region

 

[blowfish]

Hai pfd001,

Can you tell me precisely what value to give those inputs Bias1 and Bias2.What is technique or concept behind this to calculate the bias values.

 

[WM3]

Check this method, blowfish

Let's name that transistors in the stack from down to up as follows:
M0, M1, M2, M3, M4, M5 and M6.

The overdrive (or effective) voltage is Vgs-Vth. The minimum drain-source voltage of a transistor working in saturation is the overdrive voltage so,

Vbias2-min = Veff0 + Veff1 + Vgs2 = Veff0 + Veff1 + Veff2 + Vth2
Vbias1-max = Vdd - Veff6 - Veff5 - Vsg4 = Vdd - Veff6 - Veff5 - Veff4 - |Vth4|

You have to design at first the overdrive voltages according to Id, gm and required swing.

Regards,
Wael

 

[jfyan]

Hai,

Can anyone tell me the exact bias values to be given for the circuit posted in the figure .

The bias inputs are

1.Bias1.

2.Bias2.

This is a charge pump circuit used in PLLs and DLLs.Also i require the model graph or model output results for the charge pump circuits.

hi blowfish,
i think it is easy to bias the ckt,and we can use high swing cascold reference current source, which you can find in Gray's book.
good luck
jeff