Before synthesis, SDC is applied, but after synthesis, the pin name is changed, so sdc is not applied.

[Collang2]

Hi
I'm having trouble applying the sdc because of this, is there an easy way?

I used the SDC script given by the IP Vendor to synthesis(Design Compiler)
There is no problem with using IP sdc in synthesis.


In gtech netlist, Pin name is ABC.DEF/B/clocked_on (same in IP sdc)
However, after synthesis, the pin name changes to ABC_DEF/B/CK. Therefore, there is an error that this pin cannot be found.

So I can't apply sdc to Netlist in PrimeTime, and ICC

 

[oratie]

You can write sdc after synthesis. And apply this sdc in ptime.

 

[glennramalho]

There are multiple ways to deal with that
Some people just write multiple SDC files. Others prefer to write the SDC from one tool, like genus or dc, and then load it in the next tool like Innovus or ICC

Another way is to use filters to catch the pin
Example instead of using get_pins cellname/clk
you can use:

set cells [get_cells lvl/lvl/lvl_reg[0]]
set clkpin [get_pins -filter { is_clock_pin == true } -of_objects $cells]

or to get the Q:
set qpin [get_pins -filter { direction == out } -of_objects [get_cells path/path/path/flop_reg]]
SDC allows for if statements too, so you can do something like this

set rnpins [get_pins -quiet path/path/path/RN ] # IF RN is here it is post synthesis
if {[sizeof_collection $rnpins] > 0} {
set_disable_timing -from RN -to SN \
[get_cells path/path/path/flop_reg* ]
}