AXI protocol and ARVALID & RVALID

[sun_ray]

Does the ARVALID signal in AXI protocol also is a valid signal for ARLEN, ARSIZE, ARID signals?

Does the RVALID signal in AXI protocol also indicates that RRESP is also valid?

 

[Mukesh10]

Does the ARVALID signal in AXI protocol also is a valid signal for ARLEN, ARSIZE, ARID signals?

Does the RVALID signal in AXI protocol also indicates that RRESP is also valid?

Hello

ARVALID is in address read channel. When ARVALID is high it mean the the address and control information on the Address read channel is valid. the slave will respond to that address and control information.

 

[sun_ray]

Hello

ARVALID is in address read channel. When ARVALID is high it mean the the address and control information on the Address read channel is valid. the slave will respond to that address and control information.

But the AXI specification does not state that ARVALID is valid for other control signals other than address. Specification says ARVALID IS ONLY VALID FOR READ ADDRESS.

Can you please address this and also address the query on RVALID asked before in post 1?

 

[imbichie]

Hi,
The ARADDR with the control signals like ARLEN, ARSIZE, etc are taken by the Slave/Bridge only when the ARVALID and ARREADY are valid.
Similarly the When RVALID and RREADY are valid then only the RRESP and RDATA are taken by the Master/Bridge.

 

[sun_ray]

Hi,
The ARADDR with the control signals like ARLEN, ARSIZE, etc are taken by the Slave/Bridge only when the ARVALID and ARREADY are valid.
Similarly the When RVALID and RREADY are valid then only the RRESP and RDATA are taken by the Master/Bridge.

But the specification of AXI states that ARVALID for address and RVALID for RDATA. It does not state that ARVALID is also for ARLEN, ARSIZE.

 

[imbichie]

Hi,
In AMBA® AXI Protocol v1.0 Specification, its stated like this :

" The master can assert the ARVALID signal only when it drives valid [COLOR="#FF0000"][B][I]address and
control information[/I][/B][/COLOR]. It must remain asserted until the slave accepts the address and
control information and asserts the associated ARREADY signal "

 

[Mukesh10]

Hello Sun_ray

In AXI our master need to send address only one time(stating address only) . Incrementing the addressing on the basis of control information is the work of slave. we sample address and control information only if your ARVALID is high and in case of response the response is valid when slave sends rvalid signal as high with the Response.