i am trying to learn AXI protocol. i have gone through the spec but it didnt help that much.
tried looking for master slave code on open cores but nothing is there.
without the code, signals like awlock and awcache is very hard to understand
if anybody has master or slave code for axi. please share
Hi Abhinav. Reading the standard is good enough. It is not necessary to implement everything mentioned in the standard. Whatever you implement must be understood by both the master and the slave.That's it. It is just a bus interface which will be used by the master to send data to the slave and receive responses. Don't fret over few things which you don't follow. Just work on the rest which you clearly understand...
Hi ads-ee
thanks for the code. what i meant to say was i could not find any source document for the design and it is very hard to understand. it will be really helpful if you could provide related docs.