AXI master and slave design

[abhinavpr]

Hi,

i am trying to learn AXI protocol. i have gone through the spec but it didnt help that much.
tried looking for master slave code on open cores but nothing is there.
without the code, signals like awlock and awcache is very hard to understand

if anybody has master or slave code for axi. please share

-abhinavpr

 

[ads-ee]

I ran across this about 6 months ago when I was looking for a way to test an AXI4 slave design.

https://code.google.com/p/axi-bfm/

Maybe it will help you. I ended up chopping up the master code and eventually rewrote the entire thing.

 

[sharath666]

In the axi and ahb designs I have come across, wlock is generally not used. I have never observed wcache being used either...

 

[Mina Magdy]

hi
kindly if you have reaches any material other than the specs for axi i would be pleased :-D

 

[abhinavpr]

Hi ads-ee
i could not find anything at the mentioned link. can you provide the source material

I ran across this about 6 months ago when I was looking for a way to test an AXI4 slave design.

https://code.google.com/p/axi-bfm/

Maybe it will help you. I ended up chopping up the master code and eventually rewrote the entire thing.

 

[sharath666]

Hi Abhinav. Reading the standard is good enough. It is not necessary to implement everything mentioned in the standard. Whatever you implement must be understood by both the master and the slave.That's it. It is just a bus interface which will be used by the master to send data to the slave and receive responses. Don't fret over few things which you don't follow. Just work on the rest which you clearly understand...

 

[ads-ee]

Did you try reading what was on the page?...

and try clicking on links that seem to point to source code?

 

[abhinavpr]

Hi ads-ee
thanks for the code. what i meant to say was i could not find any source document for the design and it is very hard to understand. it will be really helpful if you could provide related docs.

 

[ads-ee]

i could not find any source document for the design and it is very hard to understand. it will be really helpful if you could provide related docs.

I think you need to reread post #2. I didn't write the code why would I have documentation for it.

If you want AXI documents then reread the standard, which you claim to have read.