ankurbehl
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Hi All,
In my Asynchronous implementation, i am taking the following way for generating the FIFO_EMPTY (fifo_full is not required for my case)
Depth of FIFO - 2 to power
1: Write pointer (n+1 bit) is incremented in wr_clock domain.
2: Write pointer is grey coded.
3: Grey coded write pointer is passed through synchronized in rd_clock domain.
4: This grey coded synchronized write pointer is converted back to binary write pointer.
5: This binary write pointer is compared with the read pointer (n+1 bit) are compared to generate the FIFO_EMPTY condition.
6: The FIFO buffer write/read address are n bit and are always generated/assigned in binary format.
Does this look OK ?
Any weakness in this implementation ?
Thanks in anticipation for a quick feedback..
Regards
Ankur
In my Asynchronous implementation, i am taking the following way for generating the FIFO_EMPTY (fifo_full is not required for my case)
Depth of FIFO - 2 to power
1: Write pointer (n+1 bit) is incremented in wr_clock domain.
2: Write pointer is grey coded.
3: Grey coded write pointer is passed through synchronized in rd_clock domain.
4: This grey coded synchronized write pointer is converted back to binary write pointer.
5: This binary write pointer is compared with the read pointer (n+1 bit) are compared to generate the FIFO_EMPTY condition.
6: The FIFO buffer write/read address are n bit and are always generated/assigned in binary format.
Does this look OK ?
Any weakness in this implementation ?
Thanks in anticipation for a quick feedback..
Regards
Ankur