The mentioned link in this forum explains how read pointer comparison with write pointer in an async FIFO will not create any problem even if the read pointer is incremented continuously.
I think this is true when both read and write pointers are of same frequency. But what if the read clock is faster than the write clock, say 13 times faster? Suppose that FIFO write and read pointers are of 10 bit width. Since read pointer changes with every read clock, even if grey coding is used for the read and write pointer comparisons, multiple bit changes will be there for read pointer for every write clock cycles. Won't this result in wrong full signal generation?
Obviously the FIFO becomes empty.
Read needs to be disabled as long as the FIFO is empty.
As soon as there was a WRITE to the FIFO --> the FIFO is not empty anymore and reading is enabled.
-->
Read side:
12 clocks reading is disabled
then 1 clock reading is enabled.
Obviously the FIFO becomes empty.
Read needs to be disabled as long as the FIFO is empty.
As soon as there was a WRITE to the FIFO --> the FIFO is not empty anymore and reading is enabled.
Suppose I write 700 datas initially and then starts reading so that FIFO will not become empty. I continue writing datas along with read too. Then?
In such a situation, there is a possibility that my read pointer - write pointer comparison will go wrong, right?