heng155
Junior Member level 1
vco uhf ads
Asking for help on UHF wave band(500meg~900meg) VCO design
my vco:
.3.3v source voltage,0.18u SMIC's library
.useing complementary cross-coupled pair
.useing pmos to provide tail current
---all the mosfets are rf-moses
Wn:Wp=1:4 according to Un:Up
.useing outside chip LC-tank
---varactors : infineon bb659c
---inductor :RF wirewound inductor chip L->18n,R->0.22
I'm a unexperienced student in IC design. I've tried my every poor effort
(changing W/L& changing tail current), but the phase noise performance is
still not acceptable(-85db, my VCO rarely reach this standard is all the wave band).
I guess the Q value of the LC-tank is too high that the vco is easily
drived to voltage limit region. Maybe I should minish the W/L of the moses
which provid negative resistance, but smic have no narrower rf mosfets.
My guess is reasonable? Can you give me some good idea to optimize this
VCO? Giving a specific methods in optimization will be very appreciated. Thank U!
PS:
smic availiable rf mosfets:
3.3v fingerwidth channellength fingernumber
nmos 10u 0.35~0.5 8~24(even)
pmos 10u 0.35~0.5 8~24(even)
nmos 5u 0.35 12~32(even)
pmos 5u 0.35 12~32(even)
Asking for help on UHF wave band(500meg~900meg) VCO design
my vco:
.3.3v source voltage,0.18u SMIC's library
.useing complementary cross-coupled pair
.useing pmos to provide tail current
---all the mosfets are rf-moses
Wn:Wp=1:4 according to Un:Up
.useing outside chip LC-tank
---varactors : infineon bb659c
---inductor :RF wirewound inductor chip L->18n,R->0.22
I'm a unexperienced student in IC design. I've tried my every poor effort
(changing W/L& changing tail current), but the phase noise performance is
still not acceptable(-85db, my VCO rarely reach this standard is all the wave band).
I guess the Q value of the LC-tank is too high that the vco is easily
drived to voltage limit region. Maybe I should minish the W/L of the moses
which provid negative resistance, but smic have no narrower rf mosfets.
My guess is reasonable? Can you give me some good idea to optimize this
VCO? Giving a specific methods in optimization will be very appreciated. Thank U!
PS:
smic availiable rf mosfets:
3.3v fingerwidth channellength fingernumber
nmos 10u 0.35~0.5 8~24(even)
pmos 10u 0.35~0.5 8~24(even)
nmos 5u 0.35 12~32(even)
pmos 5u 0.35 12~32(even)