ask a question about top metal

[shrbht]

in layout , a small ring using top metal connects signal line ,why?

sorry,I don't know how to show my picture here. I show it :
# represent top metal


...........#..................#..........#..........
...........#..................#..........#............
...........#..................#..........#............
...........#####.........#..........#.............
...........#.......#.........#..........#..............
...........#.......#.........#..........#..............
...........#####.........#..........#####.....
...........#..................#..........#.......#.....
...........#..................#..........#.......#.....
...........#..................#..........#####.....

 

[mark_nctu]

You can easy to change signal routing by FIB when IC debug.

 

[muldersun]

for trim

 

[flyankh]

Can you show it to us,that may be helpful.

Regards

flyankh

 

[stefano2m]

Muldersun has right. Is for laser trimming on chip. In this way you can modify series resistance, for a better matching of the two signal paths.

 

[shrbht]

Thank you . But it appears not only in analog layout but in digital layout as well. and it's not only a small ring but also a block metal (size 5um*5um) connecting signal lines.

 

[cadenceguy]

O.K. I've got it !!
The are "touch-points" for microprobing de-passified parts.

 

[shrbht]

Thank you. I don't find probe windows (pad layer) at the top of metal. and in the digital layout ,there are 118 blocks of metal (area 5um*5um). I'm not sure that the metal is for microprobe.
* represent top metal

.................*...........................................
.................*...........................................
.................*.................********.............
.................*.................********..............
.................*****************.............
.................*.................********..............
.................*.................********.................
.................*..............................................
.................*.............................................
.................*................................................