Artihmetic Operations in FPGA

[hitx]

Hi dear friends,

I am in a serious trouble with my FPGA. --- NLH --- (Need Lots of HELP!!). I am a newbie in FPGA programming . Now I have a equation like that : X(n+1) = 4*Xn*(1-Xn) . Some of you know this eqn. Anyway, Xn is in the range of 0<Xn<1 . With the initial value of Xn (e.g Xn=0.3) , I have to iterated this eqn (probably using a loop) till enough samples, then I have to store the all values in somewhere else :???: (FPGA memory, or ROM) . The problem is really big that I don't know what I need to do and How can I do. So where Should I start from ???

Note that all Xn values are float numbers . I guess that I have to convert these to binary. Am I right?

I am waiting your suggestions and help..

Thanks.

Best Wishes.

 

[TrickyDicky]

Why are they all float? thats 32 bits, and will use a lot of resources, and have a large latency. Does it have to be float? iteally you would convert them to fixed point, as these can be operated on like integers making life (and resource usage) much easier.

SO what code have you got to start with, and what help specifically are you lookjing for?

 

[K-J]

Hi dear friends,

I am in a serious trouble with my FPGA. --- NLH --- (Need Lots of HELP!!). I am a newbie in FPGA programming . Now I have a equation like that : X(n+1) = 4*Xn*(1-Xn) . Some of you know this eqn. Anyway, Xn is in the range of 0<Xn<1 . With the initial value of Xn (e.g Xn=0.3) , I have to iterated this eqn (probably using a loop) till enough samples, then I have to store the all values in somewhere else :???: (FPGA memory, or ROM) . The problem is really big that I don't know what I need to do and How can I do. So where Should I start from ???

Note that all Xn values are float numbers . I guess that I have to convert these to binary. Am I right?

I am waiting your suggestions and help..

Since you don't ask a specific question, it appears that you don't want help so much as you'd like somebody to do all the work...but here's a snippet of code anyway which will use the fixed point VHDL package. It is untested and is only meant to give you a start. The code below implements your equation and assumes that you have some input signal that indicates when you have a new X input value. Similarly, the code will generate an output flag to indicate when a new X(n+1) output has been computed.

...
signal Xn:  sfixed(1 downto -15); -- Don't know how much precision you actually need, replace 15 with whatever you need
...
process(Clock)
begin
    wait until rising_edge(Clock);
    if (I_Have_A_New_Sample = '1') then
       Xn <= resize(4*Xn*(1-Xn), Xn'left, Xn'right);
    end if;
    Output_Is_Valid <= I_Have_A_New_Sample;
end process;

Kevin Jennings

 

[hitx]

Hi dear friends,

Thanks for all replies. For the equation, all Xn values will be converted to decimal numbers between 0 -255 . For Example - (Xn*1000)mod 256 - These are all key codes (65536 samples) that will be used for encryption. Now, I have to store Xn datas somewhere else, then I will use them for the later process. I have a Xilinx Spartan 3E- cp132 family FPGA. Is that operation be possible for this process?? And another critiacal point is that How can I manage to store these datas in suitable place ?

I guess that these questions are more specific than before

Again thanks.

 

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You'll need to use 32 BRAMs (block RAM) to store 65536 8-bit samples. The largest part in the family (XC3S1600E, there is no cp132 part) has only 36 BRAMs, so if you're not using that part you'll have to use an external memory device. The simplest external memory is SRAM if it's available on the board you are using, other options are more complicated like flash, or DDR2 DRAM (is 3E even capable of interfacing to them?).